1. Technical Field
This invention relates, in general, to processing within a computing environment, and in particular, to selectively clearing a local Translation Lookaside Buffer (TLB) of a processor or a plurality of Translation Lookaside Buffers of a plurality of processors.
2. Description of Related Art
As described in U.S. Pat. No. 7,284,100, INVALIDATING STORAGE, CLEARING BUFFER ENTRIES, AND AN INSTRUCTION THEREFORE, filed May 12, 2003, which is hereby incorporated by reference, selected units of storage, such as segments of storage or regions of storage, are invalidated. The invalidation is facilitated by the setting of invalidation indicators located in data structure entries corresponding to the units of storage to be invalidated. Additionally, buffer entries associated with the invalidated units of storage or other chosen units of storage are cleared. An instruction is provided to perform the invalidation and/or clearing. Moreover, buffer entries associated with a particular address space are cleared, without any invalidation. This is also performed by the instruction. The instruction can be implemented in software, hardware, firmware or some combination thereof, or it can be emulated.